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STV5730A multistandard on-screen display for vcr, pay-tv, satellite receiver february 1996 so28 (plastic micropackage) order code : STV5730A . a character generator with ascii ram and character rom : - 128 characters - 12 dots x 18 lines character composition - 11 rows x 28 characters page composition . accurate internal bandgap voltage reference . line locked pll . video timing generator . input cvbs clamp and sync extrac- tor . vertical sync separator . input cvbs sync re-insertion . input cvbs presence detector . pal/ntsc chroma encoder . dedicated pins for luma and chroma external filtering . gain on cvbs output for either 0db or 6db capability . multistandard translucent mixed mode . opaque mixed mode . normal full page mode . video full page mode . suitable for s-vhs . three different markers can be generated simultaneously . three wire serial interface for mi- croprocessor control description the STV5730A ic is intended to be used in vcr, satellite receiver and pay-tv systems for cvbs or r/g/b text/graphics insertion. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 yout video in ftr res csync mute data clk csn r xtal out fb co bar dgnd agnd lechar lescreen cout cin yin video out2 15 xtal in video out1 b g dv dd av dd 5730a-01.eps pin connections 1/20
pin description n o name type description 1 yout analog output this pin outputs the luma to allow the user to notch filter it. this pin may be connected to the yin input for minimum cost applications. 2 video in analog input this is the cvbs input. an external capacitor is needed for clamp operation. the STV5730A extracts the sync from this signal when the c7 control bit is set. 3 res analog pin it must be tied to an external resistor to control the pll f0 frequency. 4 ftr analog pin it must be tied to the line pll loop filter. 5av dd supply pin 5v analog supply pin. 6dv dd supply pin 5v digital supply pin. 7 csync bidirectional pin this pin inputs the mixed mode composite sync when the c7 control bit is cleared. it outputs the video in extracted sync when the c7 control bit is set. 8 xtal in digital input this is the 4*fsc quartz input. the quartz may be started or stopped under control of dedicated serial interface messages. alternatively, a 4fsc clock can be input directly. the stop message must not be used in this case. 9 xtal out digital output this is the 4*fsc quartz output. the quartz may be started or stopped under control of dedicated serial interface messages. 10 mute digital output this pin indicates if the cvbs input signal is present on video in input pin. it is forced low if the m2 mode bit is cleared. 11 data digital input this is the serial interface data input. 12 clk digital input this is the serial interface clock input. 13 csn digital input this is the serial interface chip select input. 14 r digital output this is the red signal output. it is forced low during the horizontal and vertical blanking intervals. 15 g digital output this is the green signal output. it is forced low during the horizontal and vertical blanking intervals. 16 b digital output this is the blue signal output. it is forced low during the horizontal and vertical blanking intervals. 17 fb digital output this is the fast blanking output. it is delivered to control an external r/g/b switch for r/g/b or tv applications. 18 co digital output this is the character activity output. it indicates if a character foreground is being displayed, and can be used to control its intensity. 19 bar digital input this input forces the pll in free run mode when active. it is enabled if the m0 mode bit is set. 20 dgnd supply pin 0v digital ground. 21 agnd supply pin 0v analog ground. 22 lechar analog input this pin determines the character intensity level in external bias mode (ie when the c10 control bit is set). this level must be defined relative to the internal black reference. a variable luminance signal may be entered. to be grounded if not used. 23 lescreen analog input this pin determines the screen intensity level in external bias mode (ie when the c10 control bit is set). this level must be defined relative to the internal black reference. a variable luminance signal may be entered. to be grounded if not used. 24 cout analog output this pin outputs the full page mode chroma for external filtering (and attenuation if necessary). this pin may be connected to cin for minimum cost applications. 25 cin analog input this pin inputs the filtered chroma. 26 video out2 analog output if the m7 mode bit is cleared : this pin is a cvbs output that delivers the video in signal. the sync is re-inserted if the m4 mode bit is set. the output amplitude may be either 0db or +6db according to the m5 mode bit. if the m7 mode bit is set : it outputs the currently active synchronism. the signal amplitude is controlled by the m5 mode bit. if the m8 mode bit is cleared : video out2 is in high impedance state. 27 video out1 analog output this is a cvbs output. it delivers the video in + text in mixed mode and the cvbs text in full page mode. the output signal amplitude may be either 0db or 6db according to the m5 mode bit. the sync is re inserted if the m4 mode bit is set. 28 yin analog input this pin inputs the notch filtered luma. 5730a-01.tbl STV5730A 2/20
2 7 28 25 gain disable 27 26 8 19 24 14 15 16 17 18 9 1 11 13 12 10 43 20 21 6 5 control video out1 video out2 xtal in xtal out cout r g b fb co yout lechar lescreen video in csync bar agnd dgnd yin cin mute csn clk data res ftr 22 23 plxclk clamp composite sync extraction sync insertion text insertion av dd dv dd vertical sync s eparation line locked pll serial bus interface video detector luma & sync generation bias level generation color logic ram address generator h and v scanning ascii ram character rom pal/ntsc encoder & saturation stv57 30a 5730a-02.eps block diagram thermal data symbol parameter value unit r th (j-a) junction-ambient thermal resistance typ. 70 o c/w 5730a-03.tbl absolute maximum ratings symbol parameter value unit dv dd digital supply voltage 7 v av dd analog supply voltage 7 v t j junction temperature 150 o c 5730a-02.tbl STV5730A 3/20
electrical characteristics (t a =0 o cto 70 o c, av dd =dv dd = 5v, unless otherwise specified) symbol parameter min. typ. max. unit dv dd digital supply voltage dv dd - dgnd 4.75 5.0 5.25 v di dd digital supply current 10 ma av dd analog supply voltage 4.75 5.0 5.25 v ai dd analog supply current 25 ma av dd -dv dd analog to digital supply voltage difference -200 0 200 mv dv oh digital output voltage high level (i load = -1ma) dv dd - 0.5 v dv ol digital output voltage low level (i load = +1ma) dgnd + 0.5 v dv ih digital input voltage high level 0.75 x (dv dd - dgnd) v dv il digital input voltage low level 0.15 x (dv dd - dgnd) v di ih digital input current high level 1 m a di il digital input current low level -1 m a bw bandwidth at pins : video in, video out1, video out2, cin, yin, yout, cout 8.0 mhz video in (pin 2) v syncin sync pulse range 100 650 mv v cl clamp voltage 1.10 1.30 1.50 v c in external capacitor 2.2 m f video out1 (pin 27) v out1 output dynamic range 2.0 4.4 v black level voltage 2.20 2.45 2.70 v c l1 output capacitor load 20 pf r l1 output resistor load 10 k w z out1 output impedance 250 w video out2 (pin 26) v out2 output dynamic range 2.0 4.4 v black level voltage 2.20 2.45 2.70 v c l2 output capacitor load 20 pf r l2 output resistor load 10 k w z out2 output impedance 250 w gain (pins 26- 27) gain dispersion 0db 6db -1 5 0 6 +1 7 db db cin (pin 25) c cin input capacitance 0.5 pf r cin input resistance 50 k w yin (pin 28) c yin input capacitance 0.5 pf yout (pin 1) v yout output dynamic range 0.5 3.5 v c lyout output capacitor load 15 pf r lyout output resistor load 10 k w cout (pin 24) v cout output dynamic range 0.5 3.5 v c lcout output capacitor load 15 pf r lcout output resistor load 10 k w 5730a-04.tbl STV5730A 4/20
electrical characteristics (t a =0 o cto70 o c, av dd =dv dd = 5v, unless otherwise specified) (continued) symbol parameter min. typ. max. unit lescreen (pin 23) v lescr input level 1.0 3.0 v lechar (pin 22) v lech input level 1.0 3.0 v internal signal levels (pins 1- 24) v sync internal sync level 0.95 v v black internal black level 1.1 1.25 1.4 v v screen internal lescreen 1.4 v v char internal lechar 1.9 v d v1 difference level between black and sync level 250 300 350 mv d v2 difference level between screen and black level 100 150 200 mv d v3 difference level between char. and screen level 450 515 580 mv v burstpp burst amplitude 320 mv pp v ch1pp v ch2pp chroma amplitude for blue or yellow colors for red, magenta, green or cyan colors 420 580 mv pp mv pp bus (pins 11- 12 - 13) f clk clk frequency range 0 2 mhz t cwl clk width low 200 ns t cwh clk width high 200 ns t cswl csn width low maxhz* x 4 m s t cswh csn width high maxhz* x 4 m s t dclh data valid to clk high 100 ns t cld clk high to data unvalid 100 ns t clcsl clk valid to csn low 100 ns t cslcll csn low to clk low 100 ns t clhcsh clk high to csn high 100 ns t cshcl csn high to clk unvalid 100 ns * maxhz is the maximum horizontal zoom factor that is used 5730a-05.tbl data clk csn t cshcl t cswl t cslcll t cwh t cwl t dclh t clcsl t cld t clhcsh t clcsl t cswh 5730a-03.eps figure 1 STV5730A 5/20
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 luma filter (see note 1) 4.3k w 39pf xtal x 4fsc 2.2 m f to micro cvbs in (see note 4) csync (in or out) ext. 4 fsc osc in (see note 2) +5v +5v (see note 3) translucent mode chroma bp filter (see note 1) chroma trap r1 cvbs out s t v 5 7 3 0 a +5v 220nf 10 m h digital ground analog ground 39pf 220nf +5v 68 w 180 w 220pf 22nf 22k w 68 w 180 w +5v +5v +5v +5v external rgb text insertion (scart) 68 w 68 w 68 w 180 w 180 w 180 w notes : 1. optional filter. for low cost applications, short circuit. 2. the 4fsc (17.734mhz pal, 14.318mhz ntsc) crystal may be ommited if this signal is already available in a system. 3. external bias level can be set by resistor ratio as required. the level at pins lechar and lescreen must not exceed 3.0 vdc. 4. output impedance of the driving stage should be less than 300 w . 5730a-04.eps typical pal/ntsc/secam application STV5730A 6/20
functional description the STV5730A operates in omixed modeo or ofull page modeo : - mixed mode : the device is line locked to the incoming cvbs signal. the text is superimposed over the cvbs input eitherin b&w or translucent. it may also be superimposed in color by using the r/g/b outputs. - full page mode : the device generates a colored pal or ntsc cvbs output and simultaneous r/g/b outputs. both onormal full pageo and ovideo full pageo modes are supported by the STV5730A. in the onormal full pageo the screen background is uniformely colored, while the ovideo full pageo mode permits to display the unlocked video in signal in the screen back- ground area. it performs the following text features : - page composition : 11 rows x 28 characters - number of displayed characters : 308 (max) - character composition : 12 dots x 18 lines - rom character set : 128 user definable characters - screen display positions : 58 horizontal positions, 63 vertical positions - row position offset , each row : xoffset from 0 to +15, yoffset from -17 to +17 - display enable : each row or page - character color : 1 out of 8, each character - character background color : 1 out of 8, charac- ter and page enabled or set identical to character color - character border color : 1 out of 8, row enabled or set identical to character color - page background color : 1 out of 8 - zoom : 3 independant zoom factors for rows 0, 1 to 9 and 10. - zoom factors : four independant x and y zoom factors - blink : character and page enabled - blink frequency : 0.5 or 1.0 second - blink duty cycle : 0.25, 0.5 or 0.75 1 - the internal ram buffer it stores the page (i.e. the text definition) and the row attributes. 1.1 - page the page includes 11 row buffers, numbered from 0 to 10. each row buffer includes 28 characters, numbered from 0 to 27. the characters may be written one by one by the microprocessor for random access. they also may be written sequentially, starting with any character address. 1.2 - character format and attributes 11 10 9 8 7 6 0 be r g b bk character code character code : 1 character out of 128 from the character rom bk : bk=0 : character blink disabled bk=1 : character blink enabled r/g/b : character color : 000 001 010 011 100 101 110 111 black blue green cyan red magenta yellow white be : be=0 : be=1 : the character background is disabled the character background is enabled STV5730A 7/20
functional description (continued) 1.3 - row attributes there are 11 row attributes, numbered from 0 to 10. they may be written one by one or sequentially. the row attribute format is as follows : 11 8765 0 hpos offset re fbe vpos offset vpos offset : the msb is the sign bit (0 : positive, 1 : negative). if the offset is positive (from 0 to +17), then the corresponding number of lines are added on top of the row (i.e. it moves downwards). these extra lines are colored according to the character background rules. if the offset is negative (from -1 to -17), then the corresponding number of lines are subtracted from the display of the row. fbe : fbe=0 : the characters are displayed without border fbe=1 : the characters are displayed with border re : re=0 : re=1 : the characters of the row are not displayed. they are replaced by the page background color. the characters of the row are displayed. hpos offset : the display of the row is shifted to the right by the corresponding number of pixels (from 0 to 15). 1.4 - the control registers there are 5 registers for microprocessor control. they can be written individually or sequentially : - the zoom register address : 12 - the color register 13 - the control register 14 - the position register 15 - the mode register 16 1.4.1 - zoom register 11109876543210 vzb1 vzb0 hzb1 hzb0 vzm1 vzm0 hzm1 hzm0 vzt1 vzt0 hzt1 hzt0 hzt[1:0] : top row horizontal zoom factor (ie row 0) hzt[1:0] = 00 01 10 11 : : : : 1 pixel per character dot 2 pixels per character dot 3 pixels per character dot 4 pixels per character dot vzt[1:0] : top row vertical zoom factor vzt[1:0] = 00 01 10 11 : : : : 1 pixel per character line 2 pixels per character line 3 pixels per character line 4 pixels per character line hzm[1:0] : same as hzt[1:0], for middle rows (ie rows 1 to 9) vzm[1:0] : same as vzt[1:0], for middle rows hzb[1:0] : same as hzt[1:0], for bottom row (ie row 10) vzb[1:0] : same as vzt[1:0], for bottom row the output of this register is synchronized by the horizontal synchronism. the reset message clears this register. STV5730A 8/20
functional description (continued) 1.4.2 - color register (page attributes) 11109876 210 r g b r g b // // // r g b sbc fbc bcc sbc : screen background color fbc : character border color bcc : character background color the output of this register is synchronized by the horizontal synchronism. 1.4.3 - control register 11109876543210 c11 c10 c9 c8 c7 c6 c5 c4 c3 c2 c1 c0 c0 : c0 = 0 : mixed mode c0 = 1 : full page mode c1 : c1 = 0 : the character background is controlled by be (see character word description) c1 = 1 : all displayed character backgrounds are disabled c2 : c2 = 0 : display off c2 = 1 : display on c3 : c3 = 0 : the characters are colored according to the character attribute and the color register values (i.e. cbackg and cbord) c3 = 1 : the character foreground, border and background colors are all set to the character attribute value (see paragraph 1.2). this option is mainly intended for full page mode, cvbs or y/c output c4 : c4 = 0 : 1.0 second blinking period c4 = 1 : 0.5 second blinking period c[6:5] : c[6:5] = 00 01 10 11 : : : : blinking off 0.75 blinking duty cycle 0.5 blinking duty cycle 0.25 blinking duty cycle c7 : c7 = 0 c7 = 1 an external input composite sync is taken from the csync pin the sync is extracted by the STV5730A.the currently active sync is output on the csync pin c8 : c8 = 0 : the standard is ntsc, 60hz c8 = 1 : the standard is pal or secam with m6 = 0, 50hz c9 : c9 = 0 : character color encoding is disabled c9 = 1 : character color encoding is enabled c10 : c10 = 0 : the luminance levels are generated internally c10 = 1 : the luminance levels are provided by the lescreen and lechar input pins. c11 : c11 = 0 : video full page mode. a stable full page mode text is displayed while the screen background is the unlocked video input signal. c11 = 1 : normal full page mode is active. the output of this register is synchronized by the horizontal sync (except c7). the reset message clears this register. STV5730A 9/20
functional description (continued) 1.4.4 - position register 11 6 5 0 vertical position horizontal position horizontal position any value from 6 to 63 vertical position any value from 1 to 63 1.4.5 - mode register 11109876543210 m11 m10 m9 m8 m7 m6 m5 m4 m3 m2 m1 m0 m0 : m0 = 0 m0 = 1 : : the bar pin is disabled the bar pin has an action on the line pll m1 : m1 = 0 m1 = 1 : : the missing sync pulses are not detected the missing sync pulses are detected m2 : m2 = 0 m2 = 1 : : the mute pin is forced to 0 the mute pin delivers the internal mute signal m3 : m3 = 0 m3 = 1 : : the mute time constant is 8 lines the mute time constant is 32 lines m4 : m4 = 0 m4 = 1 : : the sync is not re-inserted the sync is re-inserted for improved text stability m5 : m5 = 0 m5 = 1 : : the gain of pins video out1 & video out2 is 0db. the gain of pins video out1 & video out2 is 6db. m6 : m6 = 0 m6 = 1 : : the color encoder is enabled (pal or ntsc) the color encoder is disabled (b&w or secam) m7 : m7 = 0 m7 = 1 : : the video out2 pin outputs the video in signal the video out2 pin outputs the composite sync m8 : m8 = 0 m8 = 1 : : the video out2 pin is in low impedance state the video out2 pin is in high impedance state m9 : m9 = 0 m9 = 1 : : normal mode csync pin outputs the burst gate, bar pin outputs the vsync (see note) m10 : m10 = 0 m10 = 1 : : no delay compensation it enables the delay compensation of the internal sync extractor. m11 : m11 = 0 m11 = 1 : : the mute signal output is synchronized on vertical sync in order to limit its transitions. the mute signal is not synchronized on vertical sync thus accelerating the video in presence detection (useful in full page mode). note : this mode overides the normal functions of pins csync and bar. STV5730A 10/20
functional description (continued) 2 - the microprocessor serial interface the STV5730A is down loaded by the microprocessor through a three wire serial interface : data, clk, csn. the clk and csn signals are internally ored in order to validate the transfer when the STV5730A is chip selected only (i.e. csn = 0). the csn rising edge validates the internal data transfer. 2.1 - message formats (see figure 2) 16-bit, 8-bit and 0-bit formats are available. the 8-bit and 0-bit message formats may be useful to speed up the STV5730A down loading. 15 1211 87654 0 0000 buf[11:8] stru[7:6] 0 depl[4:0] address this 16-bit address message loads the serial interface write pointer. this address is incremented after each data message. 15 12 11 0 0001 data[11:0] data this 16-bit data message writes the data at the location indicated by the write pointer. 70 data[7:0] data this 8-bit data message writes the data at the location indicated by the write pointer. the 4-bit data msb is copied from the last previous 16-bit data message. the 0-bit data message writes a data at the location indicated by the write pointer. the last data is used from the previous 8-bit or 16-bit data message. 15 12 11 0 0010 don't care control this 16-bit control message stops the 4*fsc quartz oscillator. 15 12 11 0 0011 don't care control this 16-bit control message resets the circuit and starts the 4*fsc quartz oscillator. this message should not be used if an external 4 x fsc clock is used instead of the quartz. it is mandatory that reset operation is as described in paragraph 2.3. STV5730A 11/20
data clk csn data clk csn data clk csn 15 14 13 12 2 1 0 76543210 16-bit message 8-bit message 0-bit message 5730a-05.eps figure 2 functional description (continued) 2.2 - the write pointer as described in the omessage formato paragraph, an address consists of three fields : stru[7:6], buf[11:8], depl[4:0]. the stru[7:6] field indicates whether it is a page address or a row attribute / register ad- dress. it also determines the address incrementa- tion scheme. - stru[7:6] = 00 : it is a page address. buf provides the row number (from 0 to 10) and depl provides the character number (from 0 to 27). depl is incre- mented after each data message. when the write of a row is completed, the write pointer is auto- matically set to the next row first character. - stru[7:6] = 01 : it is also a page address but the incrementation scheme is a bit different : when the write of a row is completed, the write pointer is automatically set to the first character of the same row. - stru[7:6] = 11 : it is a row attribute or a register address.the buf field must be set to 0000 and the depl field is incremented after each data access. 2.2.1 - address map page : row 0 : stru[7:6] = 0 or 1 - buf[11:8] = 0 - depl[4:0] from 0 to 27 row 1 : stru[7:6] = 0 or 1 - buf[11:8] = 1 - depl[4:0] from 0 to 27 ......... : ................. ..................... ................ row 10 : stru[7:6] = 0 or 1 - buf[11:8] = 10 - depl[3:0] from 0 t0 27 row attributes : stru[7:6] = 11 - buf[11:8] = 0 - depl[4:0] from 0 to 10 registers : stru[7:6] = 11 - buf[11:8] = 0 depl[4:0] = 12 for zoom register, 13 for color register, 14 for control register, 15 for position register, 16 for mode register STV5730A 12/20
reset & initialize 3000h 3000h 00dbh 1000h set row attributes * 0 to 10 stop next page write set control registers * zoom * color * control * position * mode set ram attributes i.e. text page * write pointer * data * etc. 5730a-14.eps figure 3 functional description (continued) 2.3 - initialization and down-loading sequence it is important that the STV5730A is correctly reset and initialized after the circuit is powered prior to any writing. this routine is shown in figure 3. the two initialization bytes (00db 1000) must procede the reset instruction (x2) every time it is transmitted. 3 - the line locked pll the pll frequency is 504 * f h = 7.875mhz. 3.1 - mixed mode behavior in mixed mode, the internal pll is line locked to the incoming cvbs signal. the sync is either extracted by the STV5730A (if c7 control bit is set) or pro- vided by the application in a composite form on the csync pin (if c7 control bit is cleared). the STV5730A separates the vertical sync from the composite synchronism. the STV5730A pll features built-in protection mechanismsagainst missing and parasitichorizon- tal sync pulses. these mechanisms are activated when the loop is locked. the STV5730A pll is also insensitive to the head switching disturbing the synchronism in vtr appli- cations (playback). the missing pulses may be detected. the m1 mode bit enables the detection. in addition, the bar input pin is available to enter a signal that forces the pll in free-run mode. this capability may be used for search mode in vtrs, to improve the loop robustness against the noise bar. the bar input is enabled by the m0 mode bit. 3.2 - horizontal sync re-insertion this mechanism is of interest in mixed mode, to cancel the text horizontaljitter when the sync signal is too bad. it is activated by the m4 mode bit and must be turned off in full page mode. the active part of the line is protected against parasitic sync insertion. the modified sync is active on all output pins (ie csync if c7 is set, video out1, video out2). a jitter greater than 0.42usec cannot be cancelled. 3.3 - full page mode behavior in this case, the pll is locked on an internal 64usec reference derived from the 4*fsc quartz. the STV5730A generates a non interlace output. 4 - mute the STV5730A monitors the sync to determine whether it is a stable signal or not. mute = high : no stable signal mute = low : stable cvbs input signal the mute search time constant may be either 8 lines or 32 lines, according to the m3 mode bit. the signal that is delivered to the mute output pin is synchronized on the vertical sync if m11 is cleared. it is forced low if the m2 mode bit is low. this signal may be monitored by the microproces- sor to switch the STV5730A from mixed mode to full page mode and vice versa (using the c0 control bit). 5 - the luma generator the luma signal is generated by the STV5730A from timing information created by the character and video timing generators and voltage levels created by the internal bias level generator or entered on the lescreen and lechar pins (as selected by the c10 control bit). the luma signal is output on the yout pin to allow the user to notch filter it. it is then re-input on the yin pin. yout and yin may be connected together for minimal cost applications. STV5730A 13/20
1 s r1 r2 28 video out1 video out2 disable s tv5730a 5730a-06.eps figure 4 : the translucent mixed mode output configuration functional description (continued) 5.1 - internal bias mode this mode is intended for minimal cost applica- tions. c10 must be cleared. the luma levels of the osd output signal are as follows : - leblack : black level nominal value : 1.25v - lesync : sync level nominal value : leblack - 300mv - lescreen : page background level nominal value : leblack + 150mv - lechar : character level nominal value : leblack + 650mv leblack is also used to clamp the video in signal and to create the character border. 5.2 - external bias mode this mode is intended to give more flexibility to the user. c10 must be set. the lescreen and lechar levels may be user defined relatively to the internal leblack level. the final luma amplitude should not be greater than the peak white level. these levels may be static or dynamic. dynamic levels can be easily generated by analog sum of the r/g/b and co STV5730A outputs (a few resistors are necessary) to give grey scale character shading in the mixed mode. c0 is useful to control the character foreground luma level. 6 - the chroma generator the STV5730Aencoder operates in full page mode only. it may performpal or ntsc encodingaccord- ing to the c8 control bit. a 4*fsc chroma quartz crystal is necessary (fsc = 4.43mhz for pal, 3.58mhz for ntsc). the encoder can be turned off by the m6 mode bit for black & white or for secam applications. the character encoding is controlled by the c9 control bit. the chroma signal is output on the cout pin for external filtering and for attenuation if necessary. it is then re-entered on the cin pin and added to the yin pin signal to create the final cvbs output signal. the chroma saturation is controlled by the STV5730A : - burst nominal amplitude : 320mv pp - blue or yellow colors nominal amplitude : 420mv pp - red, magenta, green or cyan colors nominal am- plitude : 580mv pp 7 - the markers the STV5730A can generate 3 different markers that can be activated simultaneously (i.e. on the same page). the following marker features are performed : - blinking character, character background off. the character foreground blinks (bk = 1, be = 0 or c1 = 1). - not blinking character, character background on (c1 = 0, be = 1). - blinking character, character background on. the character foreground blinks and the charac- ter background remains (bk = 1, be = 1, c1 = 0). 8 - the translucent mixed mode the video out1 and video out2 outputs may be summed via two external resistors to create a translucent text (mixed mode). in this case, the background picture is still visible behind the text. the background picture visibility (or level of trans- lucence is controlled by the resistor ratio. another benefit from this function is to allow pal/secam/ntsc multistandard applications to be built with no secam chroma re-insertion filter and no additional control switches. the sum may be cancelled by setting the m8 mode bit. in this case, the video out2 pin is in high impedance state and the resistor network delivers video out1 only. when using the resistor network, please set m8 in the following cases : - in full page mode - when osd in not displayed - to select opaque text. this allows the viewer to select by software the preferred display mode. the dc levels of the video out1, video out2 and the sum signals are high enough to directly drive a npn emitter follower driver (see table 1). STV5730A 14/20
functional description (continued) 9 - video full page mode in addition to the normal full page mode in which a uniformely colored screen background is gener- ated, the STV5730A is able to perform a ovideo full page modeo. normal and video full page mode are selected by the control bit c11 (respectively set high and low). by using the video full page mode the channel capture operation can be easily monitored on the screen since the signal at the video in input is displayed, unlocked, in the screen background area ; the text being stable and colored, with or without colored background. presence detection is permanently active to keep the microcontroller informed of the input signal quality. the information is delivered by the mute pin. this information can be used by the microcontroller to force the STV5730A into the mixed mode (set c0 low) when the input signal becomes good enough. in the video full page mode, it can be usefull to set the m11 (mode register) bit high, so that the mute signal is not synchronized on the vertical sync, thus accelerating the video in presence detection. 10 - s-vhs application (see figure 5) the STV5730Acan be used in s-vhs applications easily. the y signal must be delivered to the video in input. the video out1 output then delivers a y + text signal, whilst the video out2 delivers the y input signal, provided that the cin input is con- nected to a bias dc level. an external switch must be used to select the c signal in mixed mode or the cout output signal in full page mode. in mixed mode the chroma signal (c) can be exter- nally attenuated (multistandard translucent opera- tion) or killed (pal/ntsc opaque operation only) during the character gate controlled by the fast blanking signal. table 1 full page pal/ntsc mixed mode translucent pal/ntsc/secam opaque pal/ntsc video out1 cvbs (osd) video in or text video in or text video out2 high impedance video in high impedance s cvbs (osd) video in or r 2 x text + r 1 x video in r 1 + r 2 video in or text character gated attenuator external switch 1 2 cin mixed mode (mm) full page mode (fp) c y cout fp 22 23 STV5730A video in video out1 video out2 internal bias op tional filter mm 15 c fb y osd yor text yor full page mode opaque mixed mode trans luce nt mixed mode 28 r 2 r 1 r 1 r 2 * te xt r 1 * y r 2 5730a-07.eps figure 5 : s-vhs input/output configuration STV5730A 15/20
functional description (continued) 11 - the cvbs output picture the following tables show the picture design in cvbs output mode (videoout1 analog output pin) according to : - blink on/off (bk character attribute & c[6:5] control bits) - character background on/off (be character attribute & c1 control bit) - character border on/off (fbe row attribute) 11.1 - mixed mode character foreground character border if on character border if off character background page background not blinking and char backg off lechar leblack video not blinking and char backg on lechar leblack lescreen video blinking and char backg off video blinking and char backg on lescreen video 11.2 - full page mode character foreground character border if on character border if off character background page background not blinking and char backg off lechar + cchar leblack + cbord lescreen + cscreen not blinking and char backg on lechar + cchar leblack + cbord lescreen + cbackg lescreen + cscreen blinking and char backg off lescreen + cscreen blinking and char backg on lescreen + cbackg lescreen + cscreen cchar is a character attribute. c3 = 0 : cscreen, cbackg and cbord are page attributes, defined by the color register. c3 = 1 : cscreen is defined by the color register. cbackg and cbord are identical to cchar and thus are character attributes. STV5730A 16/20
functional description (continued) 12 - the r/g/b output picture the following tables show the picture design in r/g/b output mode, according to : - blink on/off (bk character attribute & c[6:4] control bits) - character background on/off (be character attribute & c1 control bit) - character border on/off (fbe row attribute) - c3 = 0 : cscreen, cbackg and cbord are page attributes, defined by the color register. - c3 = 1 : cscreen is defined by the color register. cbackg and cbord are identical to cchar and thus are character attributes. it is recommended to use co output signal in this case. an r/g/b external switch must be controlled by the STV5730Afb output to perform the character insertion. c0 may be used as an additional character intensity signal. 12.1 - mixed mode character foreground character border if on character border if off character background page background not blinking and char backg off cchar cbord video not blinking and char backg on cchar cbord cbackg video blinking and char backg off video blinking and char backg on cbackg video 12.2 - full page mode character foreground character border if on character border if off character background page background not blinking and char backg off cchar cbord cscreen not blinking and char backg on cchar cbord cbackg cscreen blinking and char backg off cscreen blinking and char backg on cbackg cscreen cchar is a character attribute. c3 = 0 : cscreen, cbackg and cbord are page attributes, defined by the color register. c3 = 1 : cscreen is defined by the color register. cbackg and cbord are identical to cchar and thus are character attributes. STV5730A 17/20
functional description (continued) 13 - standard characters the default device is delivered with a standard set of rom based characters (see figure 6). the user can redefine the total character set (except for the character 00h (zero)). 00h 01h 02h 03h 04h 05h 06h 07h 08h 09h 0ah 0bh 0ch 0dh 0eh 0fh 10h 11h 12h 13h 14h 15h 16h 17h 18h 19h 1ah 1bh 1ch 1dh 1eh 1fh 20h 21h 22h 23h 24h 25h 26h 27h 28h 29h 2ah 2bh 2ch 2dh 2eh 2fh 30h 31h 32h 33h 34h 35h 36h 37h 38h 39h 3ah 3bh 3ch 3dh 3eh 3fh 5730a-12.eps figure 6 STV5730A 18/20
functional description (continued) 13 - standard characters (continued) 40h 41h 42h 43h 44h 45h 46h 47h 48h 49h 4ah 4bh 4ch 4dh 4eh 4fh 50h 51h 52h 53h 54h 55h 56h 57h 58h 59h 5ah 5bh 5ch 5dh 5eh 5fh 60h 61h 62h 63h 64h 65h 66h 67h 68h 69h 6ah 6bh 6ch 6dh 6eh 6fh 70h 71h 72h 73h 74h 75h 76h 77h 78h 79h 7ah 7bh 7ch 7dh 7eh 7fh 5730a-13.eps figure 6 (continued) STV5730A 19/20
pm-so28.eps package mechanical data 28 pins - plastic micropackage dimensions millimeters inches min. typ. max. min. typ. max. a 2.65 0.104 a1 0.1 0.3 0.004 0.012 b 0.35 0.49 0.014 0.019 b1 0.23 0.32 0.009 0.013 c 0.5 0.020 c1 45 o (typ.) d 17.7 18.1 0.697 0.713 e 10 10.65 0.394 0.419 e 1.27 0.050 e3 16.51 0.65 f 7.4 7.6 0.291 0.299 l 0.4 1.27 0.016 0.050 s8 o (max.) so28.tbl information furnished is believed to be accurate and reliable. however, sgs-thomson microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no licence is granted by implication or otherwise under any patent or patent rights of sgs-thomson microelectronics. specifications mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. sgs-thomson microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of sgs-thomson microelectronics. ? 1996 sgs-thomson microelectronics - all rights reserved purchase of i 2 c components of sgs-thomson microelectronics, conveys a license under the philips i 2 c patent. rights to use these components in a i 2 c system, is granted provided that the system conforms to the i 2 c standard specifications as defined by philips. sgs-thomson microelectronics group of companies australia - brazil - china - france - germany - hong kong - italy - japan - korea - malaysia - malta - morocco the netherlands - singapore - spain - sweden - switzerland - taiwan - thailand - united kingdom - u.s.a. STV5730A 20/20

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